Embedded Systems & Microcontroller Development

Overview

A multi-peripheral embedded systems project on the ARM Cortex-M4. The focus was production-quality firmware: no blocking delays, no polling loops where interrupts work better, and full bus-level validation before declaring anything done.

Interrupt-Driven Architecture

Replaced all blocking HAL_Delay()-style calls with interrupt-driven state machines and non-blocking timing logic. Each peripheral interaction is modeled as a state transition. The CPU never stalls waiting for a peripheral; it services an interrupt when the peripheral is ready.

This cut worst-case response latency and set the system up for eventual RTOS task decomposition.

Peripheral Integration

Integrated 6+ peripherals over four bus protocols:

Peripheral	Protocol	Notes
Ultrasonic distance sensor	GPIO trigger + capture timer	Interrupt on echo pulse
3-axis accelerometer	SPI	DMA transfer for continuous sampling
LCD display	I²C	Non-blocking write queue
Piezo buzzer	PWM timer	Frequency-controlled tone generation
UART terminal	UART	Circular DMA receive buffer
Bluetooth module	UART	AT command initialization + data framing

Signal Integrity & Validation

Every peripheral was validated at the signal level before integration, not just "does it work" but "does it work correctly":

• Oscilloscope probing on SPI clock, MOSI, and chip-select lines to verify timing margins against datasheet specs
• Logic analyzer capture on I²C to confirm ACK/NACK behavior and address arbitration
• Serial terminal logging with timestamps to verify interrupt latency and state machine transitions

Finding bus issues at the signal level, rather than in application logic, saved significant debugging time on the higher-level integration.